Evaluating the performance of one-dimensional chaotic maps in the network-on-chip mapping problem

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概要

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• Mapping is one of the most critical issues in designing a NoC-based system. A good mapping of an application to a NoC will lead to more traffic among resources, which are physically close on the chip. In this paper, we introduce several one-dimensional chaotic maps for solving the NoC mapping problem. In addition we compare the solution qualities in accordance with different criteria mainly communication cost and convergence time. The results confirm an increase, due to chaotic sequences, in the value of some performance indexes.

• The Institute of Electronics, Information and Communication Engineersの論文

著者

• Khademzade Ahmad

  Iran Telecommunication Research Center

• Gharooni-fard Golnar

  Department of Computer Science, Islamic Azad University

• Moein-darbari Fahime

  Department of Computer Science, Islamic Azad University

関連論文

• Evaluating the performance of one-dimensional chaotic maps in the network-on-chip mapping problem

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