Design and FPGA implementation of digital pulse compression for chirp radar based on CORDIC

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概要

• 論文の詳細を見る

• The paper presents a full digitized approach for the pulse compression implementation in chirp radars. The emphasis is to cancel the quadratic phase term of the echo using a coordinate rotation digital computer (CORDIC). This approach has been implemented on a field programmable gates array (FPGA) and the compressed output peak is 100dB larger than the noise.

• The Institute of Electronics, Information and Communication Engineersの論文

著者

• Wen Biyang

  Electronic Information Department, Wuhan University

• Wang Caijun

  Electronic Information Department, Wuhan University

• Yan Zhisheng

  Electronic Information Department, Wuhan University

• Zhang Chong

  Electronic Information Department, Wuhan University

関連論文

• A new type full digital UHF radar system design
• Design and FPGA implementation of digital pulse compression for chirp radar based on CORDIC

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