a-Si Gate Driver designs for low power AMLCD operation

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概要

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• We have developed two 1.8" QVGA (222dpi) transflective a-Si AMLCDs with integrated gate drivers. One is optimized for a very low power normal operating mode. The other can switch to an arbitrary partial scan mode. Gate driver integration results in narrow, symmetric margins, reduced cost, and fewer interconnections. Also, we minimized the number of connections to the display while retaining some to achieve very significant power reduction.

著者

• Inada Toshiya

  Tpo Displays Japan K.k.

• Inoue Masahide

  Tpo Displays Japan K.k.

• Yamashita Keitaro

  TPO Displays Japan K.K.

• Deane Steven

  Philips Research Laboratories

• Collins Paul

  Philips Research Laboratories

• Kawata Satoshi

  TPO Displays Japan K.K.

• Onda Yasuyuki

  TPO Displays Japan K.K.

• Yoshiga Masahiro

  TPO Displays Japan K.K.

• Hector Jason

  Philips Research Laboratories

関連論文

• 低消費電力アクティブマトリクス液晶ディスプレィ駆動のためのa-Siを用いたゲートドライバの設計(ディスプレイ-IDW/AD'05を中心に-)
• a-Si Gate Driver designs for low power AMLCD operation

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