A 0.18 μm CMOS process 10-PAM transceiver for 10 Gigabit Ethernet(Session 8B : High Speed and High Frequency Applications 2)

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概要

• 論文の詳細を見る

• A transceiver for 10 gigabit Ethernet is fabricated. This transceiver is composed of a transmitter and a receiver. To increase its data rate, it uses 10 levels to transfer and receive data, so one symbol treats 3 bit data, and two symbols of data are treated in one clock period. The transmitter has a result of 3 mA as the eye height at 400 MHz clock frequency. The receiver has 2.4 Gb/s as its data rate. Therefore the measured maximum data rate of the transceiver is 2.4 Gb/s, and the measured power consumption is 182 mW. Its figure of merit, the amount of energy to transfer one bit, is 76pJ/b. This work used 0.18 μm CMOS technology.

• 2010-06-23

著者

• Cho N.

  Electronic Engineering, Sogang University

• Jeong J.

  Electronic Engineering, Sogang University

• Lee J.

  Electronic Engineering, Sogang University

• Burm J.

  Electronic Engineering, Sogang University

• Burm J.

  Electronic Engineering Sogang University

• Lee J.

  Electronic Engineering Sogang University

関連論文

• A 0.18 μm CMOS process 10-PAM transceiver for 10 Gigabit ethernet (Silicon devices and materials)
• A 0.18 μm CMOS process 10-PAM transceiver for 10 Gigabit Ethernet(Session 8B : High Speed and High Frequency Applications 2)
• A 0.18 μm CMOS process 10-PAM transceiver for 10 Gigabit Ethernet(Session 8B : High Speed and High Frequency Applications 2)

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