A Highly Linear CMOS Transconductor(Electronic Circuits)

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概要

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• A linear CMOS transconductor is presented. PMOS transistors are employed in the resistor-replacement and voltage-level shifting to avoid the body effect. To annihilate the non-linear voltage terms, the substrate-bias effect of MOS transistors is treated more accurately in our design. Consequently, the non-linearity of the large-signal transconductance is reduced. The fabricated circuit occupies an area of 245μm×176μm (≈0.043mm^2) and dissipates 0.87mW from a 3.3V supply. For an input of 1V_<p-p>, the measured output total harmonic distortion is less than 1.2%. The transconductance varies by less than 0.5% in the input range.

• 社団法人電子情報通信学会の論文
• 2006-10-01

著者

• Lin Sheng-feng

  Electronics Engineering Department National Yunlin University Of Science And Technology

• CHEN Roger

  Electronics Engineering Department, National Yunlin University of Science and Technology

• Chen Roger

  Electronics Engineering Department National Yunlin University Of Science And Technology

関連論文

• A Highly Linear CMOS Transconductor(Electronic Circuits)

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