Compiler for Architecture with Dynamic Reconfigurable Processing Unit by Use of Automatic Assignment Method of Sub-Programs Based on Their Quantitative Evaluation(Reconfigurable Device and Design Tools,<Special Section>Reconfigurable Systems)

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概要

• 論文の詳細を見る

• For a coarse grain dynamic reconfigurable processing unit cooperating with a general purpose processor, a context selection method, which can reduce total execution cycles of a given program, is proposed. The method evaluates context candidates from a given program, in terms of reduction in cycles by exploiting parallel and pipeline execution of the reconfigurable processor. According to this evaluation measure, the method selects appropriate contexts for the dynamic reconfigurable processing unit. The proposed method is implemented on the framework of COINS project. For several example programs, the generated codes are evaluated by a software simulator in terms of execution cycles, and these results prove the effectiveness of the proposed method.

• 社団法人電子情報通信学会の論文
• 2007-12-01

著者

• Sugino Nobuhiko

  Dept. Of Information Processing Tokyo Institute Of Technology

• MIYOSHI Takefumi

  Dept. of Information Processing, Tokyo Institute of Technology

• Miyoshi Takefumi

  Dept. Of Information Processing Tokyo Institute Of Technology:jsps

関連論文

• Compiler for Architecture with Dynamic Reconfigurable Processing Unit by Use of Automatic Assignment Method of Sub-Programs Based on Their Quantitative Evaluation(Reconfigurable Device and Design Tools,Reconfigurable Systems)

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