A Novel Low-Power Bus Design for Bus-Invert Coding(Digital,<Special Section>Low-Power, High-Speed LSIs and Related Technologies)

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概要

• 論文の詳細を見る

• This letter presents a novel implementation for Bus-Invert Coding called No Invert-Line Bus-Invert Coding (NIL-BIC) architecture. It not only removes the invert-lines used in previous BIC implementations, but sends the coding information without additional bus-transitions. NIL-BIC can save about 50% more bus-power than the implementations using invert-line.

• 社団法人電子情報通信学会の論文
• 2007-04-01

著者

• Roh Byeong-hee

  Graduate School Of Information And Communications Ajou University

• YOON Myungchul

  Department of Electronics Engineering, Dankook University

• Yoon Myungchul

  Department Of Electronics Engineering Dankook University

関連論文

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• A Novel Low-Power Bus Design for Bus-Invert Coding(Digital,Low-Power, High-Speed LSIs and Related Technologies)
• Achieving Maximum Performance for Bus-Invert Coding with Time-Splitting Transmitter Circuit

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