A Block-Based Architecture for Lifting Scheme Discrete Wavelet Transform(Image)

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概要

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• Two-dimensional discrete wavelet transform (DWT) for processing image is conventionally designed by line-based architectures, which are simple and have low complexity. However, they suffer from two main shortcomings-the memory required for storing intermediate data and the long latency of computing wavelet coefficients. This work presents a new block-based architecture for computing lifting-based 2-D DWT coefficients. This architecture yields a significantly lower buffer size. Additionally, the latency is reduced from N^2 down to 3N as compared to the line-based architectures. The proposed architecture supports the JPEG2000 default filters and has been realized in ARM-based ALTERA EPXA10 Development Board at a frequency of 44.33MHz.

• 2007-05-01

著者

• YANG Chung-Hsien

  Department of Electrical Engineering, National Cheng Kung University

• WANG Jia-Ching

  Department of Electrical Engineering, National Cheng Kung University

• WANG Jhing-Fa

  Department of Electrical Engineering, National Cheng Kung University

• CHANG Chi-Wei

  Department of Electrical Engineering, National Cheng Kung University

• Chang Chi-wei

  Department Of Electrical Engineering National Cheng Kung University

• Wang Jhing‐fa

  Department Of Electrical Engineering National Cheng Kung University

• Wang Jhing-fa

  Department Of Electrical Engineering National Cheng Kung University

• Wang Jia-ching

  Department Of Electrical Engineering National Cheng Kung University

• Yang Chung-hsien

  Department Of Electrical Engineering National Cheng Kung University

• WANG Jia-Ching

  Department of Computer Science and Information Engineering, National Central University

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