Synthesis for detection of transient faults (システムLSI設計技術・組込みシステム・組込技術とネットワークに関するワークショップETNET2008)

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概要

• 論文の詳細を見る

• Steadily shrinking feature sizes of circuits are the guarantee to keep up with Moore's law. But this also degrades the reliability of individual components continuously. Realizing correctly working circuits using unreliable components is a main objective for future design flows. In this work we present a technique to automatically synthesize robust circuits, i.e. circuits that are able to detect a transient fault. The BDD-based synthesis technique MuTaTe is used to enable functional tests. Similar to the razor approach, these tests are performed in a time multiplexed scheme instead of adding redundant logic. As a result the area overhead in comparison to a non-robust circuit for the same function is often negligible. Experimental results for benchmark circuits are provided.

• 2008-03-27

著者

• Fey Georschwin

  Institute Of Computer Science University Of Bremen:vlsi Design And Education Center University Of To

• Fey Goerschwin

  Institute Of Computer Science University Of Bremen:vlsi Design And Education Center University Of To

• DRECHSLER Rolf

  Institute of Computer Science, University of Bremen

• Drechsler Rolf

  Institute Of Computer Science University Of Bremen

関連論文

• Synthesis for detection of transient faults (システムLSI設計技術・組込みシステム・組込技術とネットワークに関するワークショップETNET2008)
• Synthesis for detection of transient faults (コンピュータシステム・組込技術とネットワークに関するワークショップETNET2008)
• Synthesis for Detection of Transient Faults
• Synthesis for detection of transient faults (ディペンダブルコンピューティング・組込技術とネットワークに関するワークショップETNET2008)

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