A High Resolution Multibit Sigma-Delta Modulator with Individual Level Averaging(Special Issue on the 1994 VLSI Circuits Symposium)

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概要

• 論文の詳細を見る

• A second-order sigma-delta modulator with a 3-b internal quantizer employing the individual level averaging technique has been designed and implemented in a 1.2μm CMOS technology. Testing results show no observable harmonic distortion components above the noise floor. Peak S/(N+D) ratio of 91dB and dynamic range of 96dB have been achieved at a clock rate of 2.56MHz for a 20KHz baseband. No tone is observed in the baseband as the amplitude of a 10KHz input sine wave is reduced from -0.5dB to -107dB below the voltage reference. The active area of the prototype chip is 3.1mm^2 and it dissipates 67.5mW of power from a 5V supply.

• 社団法人電子情報通信学会の論文
• 1995-06-25

著者

• Leung Bosco

  Electrical And Computer Engineering Department University Of Waterloo

• Chen Feng

  Electrical Engineering Department, University of Waterloo

• Chen Feng

  Electrical Engineering Department University Of Waterloo

関連論文

• A High Resolution Multibit Sigma-Delta Modulator with Individual Level Averaging(Special Issue on the 1994 VLSI Circuits Symposium)

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