ゲートストレスによるSiO_2およびSi-SiO_2界面の劣化現象とそのメカニズム

概要

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Flash memory device, which has been popularly used in consumer electronic appliances, suffers from restriction of rewrite cycle number due to write/Erase time degradation and memory cell current reduction. This paper describes the results of investigation on MOS characteristics degradation after positive/negative gate stresses for p-type/n-type Si substrate. The analysis results showed positive gate stress causes weak hole accumulation in SiO2 film by hole trap and strong interface state generation for p-type substrate due to hole excitation at Si-SiO2 interface. Hole accumulation in SiO2 film was observed also in negative gate stress in proportion of log (stress time). Interface state generation was observed only for n-type Si substrate because electron that reached Si-SiO2 interface releases enough energy to generate interface state with the assist of band bending at "inversion-state" semiconductor surface. Positive charge trapping in oxide and interface state generation by gate stress cause Flash memory characteristics degradations and should be controlled in order to improve non-volatile memory to be robust memory device.
近畿大学工業高等専門学校の論文
2004-12-01