A Model for Threshold Voltage Shift under Positive and Negative High-Field Electron Injection in Complementary Metal-Oxide-Semiconductor (CMOS) Transistors
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概要
- 論文の詳細を見る
High-field electron injection is an attractive tool for investigation of properties of thin dielectric layers. The paper discusses the threshold voltage degradation of complementary metal-oxide-semiconductor (CMOS) devices due to high field oxide stressing. Both the filling of existing oxide hole and electron traps and the generation of new defects, namely bulk electron traps and interface states, are carefully considered. It is shown that monitoring of stress voltage transients during constant-current electron injection into the device gate oxide may be very helpful in understanding degradation phenomena. A qualitative model is proposed to explain different behavior and susceptibility of the threshold voltage of CMOS devices to F-N stress-induced degradation. The model is based on differences in charge trapping and detrapping in different regions of very thin gate oxides under different stress conditions in p-type MOS (PMOS) and n-type MOS (NMOS) transistors.
- 社団法人応用物理学会の論文
- 1995-02-28
著者
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Viswanathan Chand
Department Of Electrical Engineering University Of California
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Brozek Tomasz
Department of Electrical Engineering, University of California
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Chan Y.
SEMATECH
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Brozek Tomasz
Department Of Electrical Engineering University Of California:the Institue Of Micro- & Optoelect
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Chan Y.
Sematech:rockwell International
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- A Model for Threshold Voltage Shift under Positive and Negative High-Field Electron Injection in Complementary Metal-Oxide-Semiconductor (CMOS) Transistors
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