A Vortex Transitional NDRO Josephson Memory Cell
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概要
- 論文の詳細を見る
A new vortex transitional NDRO memory cell has been proposed for use as a high-speed cache memory. The memory cell consists of two superconducting loops with one Josephson junction and a two-junction interferometer gate. The superconducting loop stores single-flux quantum. The interferometer gate operates as a sense gate. The memory cell employs a vortex transition in the superconducting loop for the writing and reading of data. The sense gate current margin increases to ±38% since the coupling magnetic flux is amplified by the vortex transition for nominally designed cell parameters. The memory cell operates with a ±33% address signal current margin. This paper describes the memory cell design and the dynamic behavior of computer simulations.
- 社団法人応用物理学会の論文
- 1987-09-20
著者
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Tahara Shuichi
Microelectronics Research Labs. Nec Corporation
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WADA Yosifusa
Microelectronics Research Labs., NEC Corporation
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Wada Y
Osaka Univ. Osaka Jpn
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- A Vortex Transitional NDRO Josephson Memory Cell
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