Source and Drain Parasitic Resistances of Amorphous Silicon Transistors : Comparison between Top Nitride and Bottom Nitride Configurations

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概要

• 論文の詳細を見る

• The source and drain parasitic resistances of amorphous silicon based thin film transistors (aSi:H TFT) are investigated using a very simple TFT model including a parameter extraction method. We show that this method provides an accurate measurement of these resistances and clearly explains their influence on the apparent field effect mobility μ_a of the TFTs. We compare the parasitic resistances of TFTs for the top nitride (TN) and bottom nitride (BN) configurations and we show that the usual different performances observed on the two configurations can be mainly attributed to the differences in the parasitic resistances.

• 社団法人応用物理学会の論文
• 1996-08-15

著者

• Rolland A.

  France Telecom Cnet Technopole Anticipa

• RICHARD J.

  France Telecom CNET, Technopole Anticipa

• KLEIDER J.P.

  Laboratoire de Genie Electrique de Paris, Ecole Supcerieure d'Electricite, Plateau de Moulon

• MENCARAGLIA D.

  Laboratoire de Genie Electrique de Paris, Ecole Supcerieure d'Electricite, Plateau de Moulon

• Kleider J.p.

  Laboratoire De Genie Electrique De Paris Ecole Supcerieure D'electricite Plateau De Moulon

• Mencaraglia D.

  Laboratoire De Genie Electrique De Paris Ecole Supcerieure D'electricite Plateau De Moulon

関連論文

• Source and Drain Parasitic Resistances of Amorphous Silicon Transistors : Comparison between Top Nitride and Bottom Nitride Configurations

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