Analysis of Thermal Effect on the Interfaciai Oxide between Polysilicon and Silicon for Polysilicon Bipolar Transistors by Capacitance and Contact Resistance Measurements

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概要

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• Thermal effect on the interfacial oxide between polysilicon and silicon doped with arsenic was analyzed by capacitance and contact resistance measurements. The annealing temperature was varied from 850℃ to 1000℃ and, with the increase of annealing temperature, the oxide breakup was enhanced and the contact resistance decreased. It is shown for the first time that the capacitance also decreased with the increase of annealing temperature. This suggests that the interfacial area of the oxide layer decreases and the oxide layer thickness increases due to the oxide breakup. Capacitance characteristics are also cmpared with bipolar transistor characteristics.

• 社団法人応用物理学会の論文
• 1996-11-15

著者

• Reif Rafael

  Massachusetts Institute Of Technology:(present Address) Department Of Electrical Engineering And Com

• Nakano Noboru

  Massachusetts Institute Of Technology:(present Address) Lsi Division Kawasaki Steel Corp.

• TADA Yoshihide

  Massachusetts Institute of Technology

• Tada Yoshihide

  Massachusetts Institute Of Technology:(present Address) Lsi Division Kawasaki Steel Corp.

関連論文

• Analysis of Thermal Effect on the Interfaciai Oxide between Polysilicon and Silicon for Polysilicon Bipolar Transistors by Capacitance and Contact Resistance Measurements

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