Low-Temperature Activation of Impurities Implanted by Ion Doping Technique for Poly-Si Thin-Film Transistors

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概要

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• Low-temperature activation of impurities doped by high-energy non-mass-separated ion doping (I/D) technique has been investigated for fabricating self-aligned poly-Si thin-film transistors (S/A poly-Si TFTs) at low temperature on large-area glass substrates. Phosphorus atoms implanted by I/D are, surprisingly, activated through 300℃ furnace annealing, and a sufficiently low value of sheet resistance is obtained for very thin film (≃25 nm) by combining with solid phase crystallization (SPC), which enhances crystallinity of poly-Si films. We have also confirmed excellent electrical properties of S/A poly-Si TFTs by using these techniques.

• 社団法人応用物理学会の論文
• 1992-12-30

著者

• Ohshima Hiroyuki

  Tft

• MATSUO Minoru

  TFT

• NAKAZAWA Takashi

  MIM Research Laboratory, SEIKO EPSON Corporation

• Nakazawa Takashi

  Mim Research Laboratory Seiko Epson Corporation

関連論文

• Low-Temperature Activation of Impurities Implanted by Ion Doping Technique for Poly-Si Thin-Film Transistors

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