Improvement of Poly Silicon TFT Performance with the Stacked Gate Oxide : TFT TECHNOLOGIES
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概要
- 論文の詳細を見る
Polysilicon TFTs with the stacked gate oxide have been investigated by the variations of gate oxide process condition. The first layer of gate oxide was thermally grown thin oxide and the second layer was CVD oxide. With AFM measured the surface roughness of polysilicon which is believed to be a dominant factor for the device performance. Not only the thickness of thermally grown oxide, but also the temperature of CVD oxide process affects the interface roughness between polysilicon and gate oxide. The use of the stacked gate oxide which consists of 10nm thermal oxide and low temperature CVD oxide provided the improved performance of polysilicon TFT.
- 社団法人映像情報メディア学会の論文
- 1993-10-27
著者
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Kim S.c.
Central Research Laboratory Goldstar Corporation
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Kim H.k.
Central Research Laboratory Goldstar Corporation
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Rhee S.w.
Dept. Of Chemical Engineering Pohang Institute Of Science And Technology
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Park W.K.
Central Research Laboratory, GoldStar Corporation
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Yang M.S.
Central Research Laboratory, GoldStar Corporation
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Lin I.G.
Central Research Laboratory, GoldStar Corporation
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Lin I.g.
Central Research Laboratory Goldstar Corporation
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Park W.k.
Central Research Laboratory Goldstar Corporation
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Yang M.s.
Central Research Laboratory Goldstar Corporation