Highly Reliable Polysilicon Thin Film Transistor Technology for High Density SRAM Application

概要

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In this paper, the improved on-current stability of poly-Si thin film transistor (TFT) after negative bias temperature stress is reported. The stable on-current of poly-Si TFT is achieved by using Si-rich oxide as inter-metal dielectric layer in high density SRAM With double level metal technology. The mechanism of the on-current degradation in case of using conventional PE-TEOS layer for the inter-metal dielectrics is discussed. The change of hole trap state density after the stress is measured and its effect on the on-current of poly-Si TFT is investigated by usng 2-dim. device simulation to confirm our esperimental result.
社団法人電子情報通信学会の論文
1995-07-27