New Memory Array Design Technique with Shared Sense And Restore Line

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概要

• 論文の詳細を見る

• In this paper, a new technique for enhancing the chip efficiency in DRAM design has been studied. by Sharing Sense, Restore Lines between the adjacent memory arrays during sensing restoring operation, sense and restore line width for each array can be decreased. As a result, this sharing scheme reduces the layout area of sense amplifier array without affecting sensing/restoring characteristics. An experimental 4M DRAM designed with this technique had smaller sense amplifier array than that with the conventional layout technique. The operational voltage characteristics has been improved as well.

• 社団法人電子情報通信学会の論文
• 1995-07-27

著者

• Sim Jae-kwang

  Design Dept.1 R&d Lab. Memory 1bu Lg Semicon Co.

• Chun Jun-Hyun

  Design Dept.1 R&D Lab. Memory 1BU LG Semicon Co.

• Yang Dong-Jun

  Design Dept.1 R&D Lab. Memory 1BU LG Semicon Co.

• Kim Dal-Soo

  Design Dept.1 R&D Lab. Memory 1BU LG Semicon Co.

• Kim Dal-soo

  Design Dept.1 R&d Lab. Memory 1bu Lg Semicon Co.

• Chun Jun-hyun

  Design Dept.1 R&d Lab. Memory 1bu Lg Semicon Co.

• Yang Dong-jun

  Design Dept.1 R&d Lab. Memory 1bu Lg Semicon Co.

関連論文

• New Memory Array Design Technique with Shared Sense And Restore Line

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