A 2V 2.4GHz Fully Integrated CMOS LNA with Q-Enhancement Circuit for SOC Design(<Special Issue>Devices and Circuits for Next Generation Multi-Media Communication Systems)
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概要
- 論文の詳細を見る
A fully integrated 2 V 2.4 GHz CMOS low-noise amplifier (LNA) is presented in this paper. A negative resistance circuit is used to reduce the parasitic resistors of the on-chip spiral inductor and increase the quality factor (Q). An inductor is added to the common-source and common-gate transistors of the cascode circuit to improve matching and increase power gain. The LNA is designed according to the tsmc 1P4M 0.35μm process. The parasitic effect of the on-chip spiral inductor was considered. With a 2V supply, the power gain of the LNA is 19.5dB, the noise figure is 2.7dB, and the power dissipation is 15.2mW. The input third-order intercept point (IIP3) is 0dBm. The input -1dB compression point (P _<1dB>) is -13.9dBm. The reverse isolation S12 is -44.1dB.
- 社団法人電子情報通信学会の論文
- 2003-06-01
著者
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Lin K‐y
The Department Of Electrical Engineering National Dong Hwa University
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Weng R‐m
The Department Of Electrical Engineering National Dong Hwa University
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Weng Ro-min
Department Of Electrical Engineering National Dong Hwa University
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Hsiao C‐l
The Department Of Electrical Engineering National Dong Hwa University
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Hsiao Chih-lung
Department Of Electrical Engineering National Dong Hwa University
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LIN Kun-Yi
Department of Electrical Engineering, National Dong Hwa University
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Lin Kun-yi
Department Of Electrical Engineering National Dong Hwa University
関連論文
- A 0.7V 3-5GHz CMOS Low Noise Amplifier for Ultra-Wideband Applications(Active Devices/Circuits,Microwave and Millimeter-Wave Technology)
- A 2V 2.4GHz Fully Integrated CMOS LNA with Q-Enhancement Circuit for SOC Design
- A Sub 1V 2.4GHz CMOS Variable-Gain Low Noise Amplifier(Analog Circuit and Device Technologies)
- A 2V 2.4GHz Fully Integrated CMOS LNA with Q-Enhancement Circuit for SOC Design(Devices and Circuits for Next Generation Multi-Media Communication Systems)