A CMOS 310 MHz, 20 dB Variable Gain Amplifier

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概要

• 論文の詳細を見る

• This paper describes a new special purpose Variable Gain Amplifier (VGA) using 0.5μm digital CMOS process. The new architecture allows the gain to be varied more than 20 dB, and does not trade bandwidth for gain. Despite low power consumption (22 mW) from a 3.3 Volt supply, the circuit has 310 MHz -3 dB bandwidth and shows low THD (-45 dB) over its full frequency range. The new VGA architecture does not use any capacitor or resistor array for gain adjustment, thus it is very compact. (0.14 mm × 0.26 mm) and requires less power than conventional designs.

• 社団法人電子情報通信学会の論文
• 2003-05-01

著者

• Hadidi Khayrollah

  Electrical Enginnering Department, Urmia University

• Hadidi Khayrollah

  Electrical Engineering Department Urmia University

• KHOEI Abdollah

  Electrical Engineering Department, Urmia University

• Khoei Abdollah

  Electrical Engineering Department Urmia University

• JENABI Mahta

  Electrical Engineering Department, Urmia University

• PEYRAVI Hamed

  Electrical Engineering Department, Urmia University

• Jenabi Mahta

  Electrical Engineering Department Urmia University

• Peyravi Hamed

  Electrical Engineering Department Urmia University

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• A Current-Mode, First-Order Takagi-Sugeno-Kang Fuzzy Logic Controller, Supporting Rational-Powered Membership Functions(Analog Circuits and Related SoC Integration Technologies)
• A CMOS 310 MHz, 20 dB Variable Gain Amplifier

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