Interconnect Design Methodology Fitting to the High Speed Switching and Higher Levels of Integration

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概要

• 論文の詳細を見る

• The signals on all metal wires should be handled as the electromagnetic wave regardless of the wire length or the wavelength at the case of high-speed digital circuit design. In this paper the novel high-speed digital circuit design methodology is presented. It's includes the followings. The first one is that the digital signal is not formed from many harmonic continues waves but many phase sifted step shape signals. The second one is the analogy that the signal propagation in the digital circuit can be regarded as the charge or discharge phenomenon of the capacitance in the wires and the gate of FET by the electromagnetic wave. The last one is the design method of attenuating the transient vibration by the resistance in the microscopic wire. The 6 GHz up continues switching was confirmed on the signal wires between MOS FET via LSIs and the ordinarily structured multi layer PCB by applying the novel design methodology.

• 一般社団法人電子情報通信学会の論文
• 2002-03-01

著者

• Tohya Hirokazu

  Emc Engineering Center Production Technology Laboratories Nec Laboratories

関連論文

• New Technologies Doing Much for Solving the EMC Problem in the High Performance Digital PCBs and Equipment (Special Section on Selected Papers from the 11th Workshop on Circuits and Systems in Karuizawa)
• A Shield Strip Type Low Impedance Line Component Using a Conducting Polymer for a Wide Frequency Band De-Coupler Set(Special Issue on Recent Progress in Organic Molecular Electronics)
• Interconnect Design Methodology Fitting to the High Speed Switching and Higher Levels of Integration

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