A Novel All-Direction On-Chip Protection Circuit(<特集>Special Issue on Signals, Systems and Electronics Technology)

概要

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A new low-voltage, all-in-one ESD (electrostatic discharging) protection circuit was designed. One such ESD protection unit is enough to protect each I/O pad against ESD stresses of all modes, i.e., from I/O to power supply and ground positively and negatively. This novel ESD circuit features adjustable trigger-voltage, i.e., 5 V to 60 V, with low turn-on threshold down to 5 V, symmetric active discharging channels in all directions, fast response time of 0.1 to 0.3ns, and high ESD performance/area ratio of greater than 80V per micrometer width. It was implemented in commercial BiCMOS technologies and achieved 14kV human body model (HBM) and 15kV air-gap IEC ESD protection levels. This compact ESD structure can not only provide adequate ESD protection, but also minimize the ESD-induced parasitic effects, which makes it a suitable ESD protection solution for mixed-signal and RF ICs in very deep submicron regime.
社団法人電子情報通信学会の論文
2002-03-01