A Reconfigurable Digital Signal Processor(Special Issue on Novel VLSI Processor Architectures)

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概要

• 論文の詳細を見る

• This paper describes a new architecture-based DSP processor, which consis of n×n mesh multiprocessor for digital signal processing.A prototype chip, RCDSP9701 has been designed and implemented using a CMOS 0.6μm process.This architecture has better performance compare to the traditional microprocessor solution to Digital Signal Processing.The proposed method poses remarkable flexibility compare to ASIC(Application Specified Integrated Circuits)approach for Digital Signal Processing applications.In addition, the proposed architecture is fault tolerant and suitable for parallel computing applicatios.In this paper, an implementation into a silicon chip of the new architecture is presented to give a bettter understanding of our work.

• 社団法人電子情報通信学会の論文
• 1998-09-25

著者

• Tan Boon

  The Authors Are With The Department Of Electronics And Information Systems Faculty Of Engineering Os

• Yoshimura Ryuji

  The Authors Are With The Department Of Electronics And Information Systems Faculty Of Engineering Os

• Taniguchi Kenji

  The Authors Are With The Department Of Electronics And Information Systems Faculty Of Engineering Os

• OGAWA Toru

  The authors are with the Department of Electronics and Information Systems, Faculty of Engineering,

• Ogawa Toru

  The Authors Are With The Department Of Electronics And Information Systems Faculty Of Engineering Os

関連論文

• A Reconfigurable Digital Signal Processor(Special Issue on Novel VLSI Processor Architectures)

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