A Fuzzy Logic Inference Processor (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))

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概要

• 論文の詳細を見る

• A mixed analog-digital fuzzy logic inference engine chip fabricated in an 0.8 μm CMOS process is described. Interface to the processor behaves like a static RAM, and computation of the fuzzy logic inference is performed between memory locations in parallel by an array of analog charge-domain circuits. Eight inputs and four outputs are provided, and up to 32 rules may be programmed into the chip. The results of the inference over all rules, including a center-of-mass defuzzification, may be computed in 2 μs.

• 社団法人電子情報通信学会の論文
• 1994-05-25

著者

• Barton J.brock

  Texas Instruments Inc. Integrated Systems Laboratory

• Fattaruso John

  Texas Instruments Inc., Integrated Systems Laboratory

• Mahant-Shetti Shivaling

  Texas Instruments Inc., Integrated Systems Laboratory

• Fattaruso John

  Texas Instruments Inc. Integrated Systems Laboratory

• Mahant‐shetti S

  Texas Instruments Inc. Tx Usa

• Mahant-shetti Shivaling

  Texas Instruments

関連論文

• A Fuzzy Logic Inference Processor (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
• A Multiplexer-Based Architecture for High-Density, Low-Power Gate Arrays(Special Issue on the 1994 VLSI Circuits Symposium)

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