Algorithms for Drift-Diffusion Device Simulation Using Massively Parallel Processors (Special Issue on 1993 VLSI Process and Device Modeling Workshop (VPAD93))

概要

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The performance of a drift-diffusion device simulator using massively parallel processors is improved by modifying the preconditioner for the iterative solver and by improving the initial guess for the Newton loop. A grid-to-processor mapping scheme is presented to implement the partitioned natural ordering preconditioner on the CM-5. A new preconditioner called the block partitioned natural ordering, which may include fill-ins, improves performance in terms of CPU time and convergence behavior on the CM-5. A multigrid discretization to implement a block Newton initial guess routine is observed to decrease the CPU time by a factor of two. Extensions of the initial guess routine show further reductions in the final fine grid linear iterations.
社団法人電子情報通信学会の論文
1994-02-25