On Testing of Josephson Logic Circuits Composed of the 4JL Gates(Special Issue on Test and Diagnosis of VLSI)

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概要

• 論文の詳細を見る

• We have specified typical fabrication defects of the current injection logic gates with four Josephson junctions(4JL gates), and then investigated the voltage and current behavior of defective gates by SPICE simulation to evaluate the defect coverage achieved by logic testing and current testing. The simulation results show that current testing may possibly achieve a high defect coverage while logic testing cannot detect almost half defects.

• 社団法人電子情報通信学会の論文
• 1998-07-25

著者

• Sasaki Tsuyoshi

  The Department Of Computer Science Meiji University

• Yamada Teruhiko

  The Department Of Computer Science Meiji University

関連論文

• On Testing of Josephson Logic Circuits Composed of the 4JL Gates(Special Issue on Test and Diagnosis of VLSI)

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