Coherent Optimisation Strategies for Multilevel Synthesis (Special Issue on Synthesis and Verification of Hardware Design)
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概要
- 論文の詳細を見る
This paper shows that coherent optimization strategies for multilevel systhesis should rely on a good link between the factorization, the technology mapping and the netlist optimization. Factorization options are shown to play a key role. The technology mapping should optimize both area and critical path and only "netlist structure preserving" optimization techniques (buffer insertion, gate replication) should be applied first to preserve the factorization decision. Only in a last step resynthesis of critical areas based on a local view is applied. The approach has been experimented on a set of large combinational benchmarks.
- 社団法人電子情報通信学会の論文
- 1993-09-25
著者
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Besson Thierry
Csi
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Sakouti Khalid
Institut National Polytechnique de Grenoble
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Abouzeid Pierre
CSI
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Crastes Michel
Institut National Polytechnique de Grenoble
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Fron Jerome
Institut National Polytechnique de Grenoble
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Saucier Gabriele
CSI