Analysis and Design of Class E Low dv/dt PWM Synchronous Rectifier Regulating the Output Voltage at a Fixed Frequency

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概要

• 論文の詳細を見る

• A class E low dv/dt PWM synchronous rectifier regulating the output voltage at a fixed frequency is presented, analyzed and verified experimentally. This rectifier is derived from the class E low dv/dt rectifier by replacing the controlled switch (MOSFET with its anti-parallel diode) with the rectifier diode in class E low dv/dt rectifier, and by using the synchronized PWM signal to control the output voltage at desired value. The ZVS condition of the controlled switch can be maintained from full-loaded to open-loaded. The experimental results measured at switching frequency 1 MHz are in good agreement with the theoretical prediction.

• 社団法人電子情報通信学会の論文
• 2001-10-01

著者

• Mori Shinsaku

  The Department Of Electrical Engineering Nippon Institute Of Technology

• Boonyaroonate Itsda

  The Department Of Electrical Engineering Nippon Institute Of Technology

関連論文

• Analysis and Design of Class E Low dv/dt PWM Synchronous Rectifier Regulating the Output Voltage at a Fixed Frequency
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