Throughput Analysis of the Bifurcated Input-Queued ATM Switch
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概要
- 論文の詳細を見る
In this paper there suggested is a bifurcated (or multiple) input-queued ATM switch in which a buffer for each input port is divided into multiple (m) buffer blocks, i.e., bifurcated buffers, for enhancement of the limited throughput of the ordinary input-queued switch using a single FIFO. As the contention/arbitration rule for the bifurcated input-queued switching scheme, free and restricted contention rules are come up with and discussed. The free rule allows an input port to switch up to m cells at the cost of internal speedup. With the restricted rule, on the other hand, an input port can switch no more than one cell in a time slot so that the switch operates at the same speed as the external link speed. The throughput bound for the bifurcated input-queued switch is analyzed for both rules through the generalization of the analysis by Karol et al.. The throughput bound approaches to 1.0 as m becomes large enough, irrespective of the contention/arbitration rule.
- 社団法人電子情報通信学会の論文
- 1999-05-25
著者
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Lee Y
Univ. Edinburgh Edinburgh Gbr
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Oh Changhwan
Communication Network Laboratory Department Of Information And Communications Kwang-ju Institute Of
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KIM Kiseon
Communication Networks Laboratory, Kwang-Ju Institute of Science and Technology (K-JIST)
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KIM Hakyong
Communication Network Laboratory, Department of Information and Communications, Kwang-Ju Institute o
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LEE Yongtak
Communication Network Laboratory, Department of Information and Communications, Kwang-Ju Institute o
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Lee Yongtak
Communication Network Laboratory Department Of Information And Communications Kwang-ju Institute Of
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Kim Hakyong
Communication Network Laboratory Department Of Information And Communications Kwang-ju Institute Of
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Kim Kiseon
Communication Network Laboratory Department Of Information And Communications Kwang-ju Institute Of
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