A 156Mb/s Interface CMOS LSI for ATM Switching Systems

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This paper describes a 0.8-μm CMOS LSI developed for a 156-Mb / s serial interface in ATM switching systems. Recently, there have been increasing problems of connector pin neck and higher power consumption when enhancing switching system capacity. To overcome these problems, we have developed an LSI with a high-speed interface by using CMOS technology to achieve low power consumption. A low-swing differential signal level is used to achieve 156-Mb / s data transmission. We named this new circuit technique ALTS (Advanced Low-level Transmission circuit System). Using the LSI, transmission can be achieved between boards or racks through a -meter twisted pair cable. The LSI has a 156-Mb / s transmitterreceiver, a serial-to-parallel converter and a parallel-to-serial converter. It performs 19.5-Mb / s parallel data / 156-Mb / s serial data conversion and 156-Mb / s serial data transmission. In addition, it has a bit phase synchronizer and cell synchronizer, which enables it to transmit and synchronize serial data without a paralleled clock or a paralleled cell top signal, by distributing a common 156-MHz clock and a common cell top signal to the whole system. We evaluated the bit error rate and timing margin on data transmission under several conditions. The results show that we can apply this LSI to commercially available ATM switching systems. This paper also describes methods of expanding switch capacity and transmitting 624-Mb / s data using this LSI.
社団法人電子情報通信学会の論文
1993-06-25

A 156Mb/s Interface CMOS LSI for ATM Switching Systems

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