An On-Chip Power-on Reset Circuit for Low Voltage Technology(<特集>Special Section on Analog Circuit Techniques and Relate)
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概要
- 論文の詳細を見る
The power supply voltage of LSI has been lowered due to system requirements for low power dissipation. An on-chip power-on reset pulse generator (POR-PG) is used to determine the initial state of the memory devices of the system LSI. The requirement for the POR-PG is strict for lower power supply voltage because noise margin is smaller relatively. This paper describes a POR-PG for low power voltage supply (V_<dd>) which overcomes these problems. Hardware measurement proves improved pulse height relative to various power-on profiles (slope, rise time etc.) and fluctuations of temperature and process. Further, the design provides robust noise immunity against voltage fluctuations on the power supply line. The circuit is implemented within a small area (115 μm × 345 μm) in the input/output buffer area of a micro-processor and hard-disk controller integrated LSI with 0.25-μm four-layer-metal CMOS technology.
- 社団法人電子情報通信学会の論文
- 2002-02-01
著者
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Yasuda Takeo
Yasu Technology Application Laboratory Ibm Japan
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Yamamoto Masaaki
Yasu Technology Application Laboratory Ibm Japan