Multilayer Neural Network with Threshold Neurons(Special Section of Papers Selected from ITC-CSCC'97)

概要

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In this paper, a new architecture of Multilayer Neural Network(MNN)with on-chip learning for effective hardware implementation is proposed. To reduce the circuit size, threshold function is used as neuron's activating function and simplified back-propagation algorithm is employed to provide on-chip learning capability. The derivative of the activating function is modified to improve the rate of successful learning. The learning performance of the proposed architecture is tested by system-level simulations. Simulation results show that the modified derivative function improves the rate of successful learning and that the proposed MNN has a good generalization capability. Furthermore, the proposed architecture is implemented on field programmable gate array(FPGA). Logic-level simulation and preliminary experiment are conducted to test the on-chip learning mechanism.
社団法人電子情報通信学会の論文
1998-06-25