Fully Balanced CMOS Current-Mode Filters for High-Frequency Applications

概要

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A CMOS fully balanced current-mode filter is presented. A fully balanced current-mode integrator which is the basic building block is implemented by adding a very simple common-mode-rejection mechanism to fully differential one. The fully balanced operation can eliminate even order distortion, which is one of the drawbacks in previous continuous current-mode filter. Moreover, the additional circuit can work as not only common-mode-rejection mechanism but also Q-tuning circuit which compensates lossy elements due to finite output impedance of MOS FET. A prototype fifth-order low-pass ladder filter designed in a standard digital 0.8 μm CMOS process achieved a cut-off frequency (f_C) of 100 MHz; f_C was tunable from 75 MHz to 120 MHz by varying a reference bias current from 50 μA to 150 μA. Using a single 3 V power supply with a nominal reference current of 100 μA, power dissipation per one pole is 30 mW. The active filter area was O.011 mm^2/pole and total harmonic distortion (THD) was 0.73[%] at 80 MHz, 80 μA amplitude signal. Furthermore, by adjusting two bias currents, on chip automatic both frequency and Q controls are easily implemented by typical tuning systems, for example master-slave tuning systems.
社団法人電子情報通信学会の論文
1996-06-25