Optimal Sorting Algorithms on Bus-Connected Processor Arrays
スポンサーリンク
概要
- 論文の詳細を見る
This paper presents a parallel sorting algorithm which sorts n elements in O(n / w+n log n / p) time using p(≦n) processors arranged in a 1-dimensional grid with w (≦n^<1-ε>) buses for every fixed ε>0. Furthermore, it is shown that n×p elements can be sorted in O(n / w+n log n / p) time on p×p (p≦n) processors arranged in a 2-dimensional grid with w(≦n^<1-ε>) buses in each column and in each row. These algorithms are optimal because their time complexities are equal to the lower bounds.
- 社団法人電子情報通信学会の論文
- 1993-11-25
著者
-
Nakano K
Hitachi Ltd. Saitama Jpn
-
Nakano Koji
the Advanced Research Laboratory, Hitachi, Ltd.
-
Nakano Koji
The Advanced Research Laboratory Hitachi Ltd.
関連論文
- Optimal Sorting Algorithms on Bus-Connected Processor Arrays
- Doubly-Logarithmic Energy-Efficient Initialization Protocols for Single-Hop Radio Networks(Special Section on Discrete Mathematics and Its Applications)