An Efficient Algorithm for Multiple Folded Gate Matrix Layout (Special Section on VLSI Design and CAD Algorithms)

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概要

• 論文の詳細を見る

• We propose a new multiple folding algorithm for the gate matrix layout, and apply it to generation of rectangular blocks with flexible size. The algorithm consists of two phases, the net partitioning and the gate arrangement, and both algorithms are based on the multi-way mini-cut technique. In the first and second phases, the width and height of the multiple folded gate matrix block are directly minimized, respectively, such that the area is minimized and desired aspect ratio of the block is obtained. The features of the present algorithm are as follows: (1) Dead space on the gate matrix block can be minimized, (2) the aspect ratio can be controlled finely, (3) since polar graphs are successfully used in the second phase, the efficiency of the algorithm can be much improved. The experimental results show the effectiveness of our algorithm.

• 一般社団法人電子情報通信学会の論文
• 1993-10-25

著者

• Yamada Shoichiro

  The Faculty Of Engineering Osaka City University

• Nakayama Shunichi

  the Faculty of Engineering, University of Osaka Prefecture

• Nakayama Shunichi

  The Faculty Of Engineering University Of Osaka Prefecture

関連論文

• An Efficient Algorithm for Multiple Folded Gate Matrix Layout (Special Section on VLSI Design and CAD Algorithms)

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