A 6.25 mm^2 2.4 GHz CMOS 802.11b Transceiver(<Special Section>Papers Selected from AP-ASIC 2004)

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概要

• 論文の詳細を見る

• This CMOS transceiver IC exploits the superheterodyne architecture to implement a low-cost RF front-end with only 6.25 mm^2 die area for IEEE 802.11b standard. The transceiver is implemented in 0.25μm CMOS process with 2.7 V supply voltage, and achieves a -86 dBm 11 Mb/s receive sensitivity and a 2 dBm transmit output power.

• 社団法人電子情報通信学会の論文
• 2005-08-01

著者

• Chen David

  Muchip

• Hu Wei-yi

  Graduate Institute Of Electronics Engineering And The Department Of Electrical Engineering National

• HSIEH Yong-Hsiang

  Graduate Institute of Electronics Engineering and the Department of Electrical Engineering, National

• LI Wen-Kai

  MuChip

• LIN Shin-Ming

  MuChip

• CHEN Chao-Liang

  MuChip

• CHEN Sao-Jie

  Graduate Institute of Electronics Engineering and the Department of Electrical Engineering, National

• Chen Sao-jie

  Graduate Institute Of Electronics Engineering And Dept. Of Electrical Engineering National Taiwan Un

• Chen Sao-jie

  Graduate Institute Of Electronics Engineering And The Department Of Electrical Engineering National

• Hsieh Yong-hsiang

  Graduate Institute Of Electronics Engineering And The Department Of Electrical Engineering National

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• A 6.25 mm^2 2.4 GHz CMOS 802.11b Transceiver(Papers Selected from AP-ASIC 2004)
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