Characterization and Modeling of Gate-Induced-Drain-Leakage(<Special Section>Microelectronic Test Structures)

概要

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We present measurements of Gate-Induced-Drain-Leakage at various temperatures and terminal biases. Besides Band-to-Band tunneling leakage observed at high Drain-to-Gate voltage V_<DG>, we also observed Trap-Assisted-Tunneling leakage current at lower V_<DG>. Based on ISE TCAD simulations of the electric field, we propose analytical models for Band-to-Band and Trap-Assisted Gate-Induced-Drain-Leakage currents suitable for compact modeling.
社団法人電子情報通信学会の論文
2005-05-01