Lateral and Vertical Scaling of High-f_<max> InP-Based HBTs(<Special Section>Analog Circuit and Device Technologies)

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概要

• 論文の詳細を見る

• Design approach to improving f_<max> of InP-based HBTs by combining lateral scaling (lithographic scaling) and vertical scaling (improving f_T) is discussed. An HBT scaling model is formulated to provide means of analyzing the essential impact of scaling on f_<max>. The model was compared with measurements of single and double heterojunction bipolar transistors with different f_T and various emitter sizes. While a high f_<max> of 313GHz was achieved using submicron HBT with high f_T, it was found that further improvement could have been obtained by reducing the emitter resistance, which has imposed considerable limit on lateral scaling.

• 社団法人電子情報通信学会の論文
• 2004-06-01

著者

• Fujihara Akira

  Photonic And Wireless Devices Research Labs. Nec Corporation

• TANAKA Shinichi

  Photonic and Wireless Devices Research Labs., NEC Corporation

• IKENAGA Yoshifumi

  Photonic and Wireless Devices Research Labs., NEC Corporation

• Ikenaga Yoshifumi

  Photonic And Wireless Devices Research Labs. Nec Corporation

• Tanaka Shinichi

  Photonic And Wireless Devices Research Laboratories Nec Corporation

• Tanaka Shinichi

  Photonic And Wireless Devices Research Labs. Nec Corporation

関連論文

• Lateral and Vertical Scaling of High-f_ InP-Based HBTs(Analog Circuit and Device Technologies)
• GaAs-based high-frequency and high-speed devices

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