A High-Speed and Multi-Chip WTA/MAX Circuit Design Based on Averaged-Value Comparison Approach(Electronic Circuits)

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概要

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• This paper presents a voltage-mode WTA/MAX circuit that achieves high-speed and multi-chip features. Based on the efficient averaged-value comparison approach, the time and hardware complexities are proportional to O(logN) and O(N) respectively, where N is the number of inputs. In addition, a voltage comparison element (VCE) circuit is proposed to achieve multi-chip function. In the proposed circuit, the averaged-value calculator is built using resistor array that prevents the matching problem of transistor array. The whole circuit was fabricated with the TSMC 0.35μm signal-poly quadruple-metal CMOS process. With eight input signals, the measurement results show that the proposed circuit resolved input voltages differing by 10mV in 30 ns, and the multi-chip capability was also verified.

• 社団法人電子情報通信学会の論文
• 2004-10-01

著者

• Lin Chi-sheng

  The Department Of Electrical Engineering National Cheng Kung University

• Liu Bin-da

  The Department Of Electrical Engineering National Cheng Kung University

• LIN Kuo-Huang

  the Department of Electrical Engineering, National Cheng Kung University

• Lin Kuo-huang

  The Department Of Electrical Engineering National Cheng Kung University

関連論文

• A High-Speed and Multi-Chip WTA/MAX Circuit Design Based on Averaged-Value Comparison Approach(Electronic Circuits)
• A Third-Order Low-Distortion Delta-Sigma Modulator with Opamp Sharing and Relaxed Feedback Path Timing

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