A Systematic Approach for Low Phase Noise CMOS VCO Design(Special Issue on Microwave and Millimeter Wave Technology)

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概要

• 論文の詳細を見る

• The fully integrated LC voltage controlled oscillator by 0.35μm CMOS technology is demonstrated. It has 2 GHz oscillation frequency, 23.58mW power consumption under 3V biased and 9.1% frequency tuning. The layout optimization method of inductor to increase quality factor and also to reduce phase noise is used. A general method is proposed which is capable of making an effective prediction of F, device excess noise number, and acquiring the phase noise of oscillators accurately. From this proposed method, the low phase noise by calculation is attained. The phase noise of measured value which shows good match with calculating data is about -115.5 dBc/Hz at off set frequency 600kHz.

• 社団法人電子情報通信学会の論文
• 2003-08-01

著者

• Wu Pi-an

  Institute Of Communication Engineering National Chiao-tung University

• Kao Yao-huang

  Institute Of Communication Engineering National Chiao-tung University

• Hsu Meng-ting

  Institute Of Communication Engineering National Chiao-tung University

• HSU Min-Chieh

  Institute of Communication Engineering, National Chiao-Tung University

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• A Systematic Approach for Low Phase Noise CMOS VCO Design(Special Issue on Microwave and Millimeter Wave Technology)
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