Estimation of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems

スポンサーリンク

概要

• 論文の詳細を見る

• This paper presents an efficient method for estimating maximum simultaneous switching noise (SSN) of ground interconnection networks in CMOS systems. For the derivation of maximum SSN expression we use α-power law MOS model and an iterative method to reduce error that may occur due to the assumptions used in the derivation process. The accuracy of the proposed method is verified by comparing the results with those of previous researches and HSPICE simulations under the present process parameters and environmental conditions.

• 社団法人電子情報通信学会の論文
• 2001-03-01

著者

• Baek J‐h

  The School Of Computing Soongsil University

• BAEK Jong-Humn

  the School of Computing, Soongsil University

• KIM Seok-Yoon

  the School of Computing, Soongsil University

• Kim Seok-yoon

  The School Of Computing Soongsil University

関連論文

• Estimation of Maximum Simultaneous Switching Noise for Ground Interconnection Networks in CMOS Systems

スポンサーリンク