Physical Modeling Needed for Reliable SOI Circuit Design (Special Issue on SOI Devices and Their Process Technologies)
スポンサーリンク
概要
- 論文の詳細を見る
Physical models for fully depleted (FD) and non-fully depleted (NFD) SOI MOSFETs are overviewed, and recent applications of them (in SOISPICE) are described, stressing the need for good physics-based accounting for the inherently coupled bipolar and MOS device features in reliable circuit design. The applications suggest that asymmetrical double-gate FD/SOI CMOS technology can be scaled below 0.1μm, whereas the single-gate counterpart seemingly cannot be, and that the floating-body charge dynamics and the associated transient leakage current in NFD/SOI (and FD/SOI) pass transistors in memory (DRAM and SRAM) circuits can be effectively controlled by optimal device design.
- 社団法人電子情報通信学会の論文
- 1997-03-25
著者
-
Fossum Jerry
Department Of Electrical And Computer Engineering University Of Florida
-
KRISHNAN Srinath
Department of Electrical and Computer Engineering, University of Florida
-
Krishnan Srinath
Department Of Electrical And Computer Engineering University Of Florida