A Low Power CMOS Dual Modulus Prescaler for Frequency Synthesizers

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概要

• 論文の詳細を見る

• A low power dual modulus prescaler for frequency synthesizers has been designed in a standard 1.2μm digital CMOS process using enhancement source coupled logic (ESCL). Being a differential low amplitude current mode logic, ESCL has two interesting characteristics for this design besides low power consumption: the low noise performance, that allows this circuit to be on the same chip with sensitive analog circuitry, and the ability to run with a 200mV sinusoidal signal as generated from an LC oscillator without the need of a clock amplifier. At 195MHz and 3V supply, the current consumption of the prescaler is as low as 289μA, while maximum operating frequencies of 910MHz at 5V and 650MHz at 3V are achieved.

• 社団法人電子情報通信学会の論文
• 1997-02-25

著者

• Piazza Francesco

  Integrated Systems Laboratory Swiss Federal Institute Of Technology (eth)

• HUANG Qiuting

  Integrated Systems Laboratory, Swiss Federal Institute of Technology (ETH)

• Huang Qiuting

  Integrated Systems Laboratory Swiss Federal Institute Of Technology (eth)

関連論文

• A Low Power CMOS Dual Modulus Prescaler for Frequency Synthesizers

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