The Application of DOE and RSM Techniques for Wafer Mapping in IC Technology (Special Issue on Microelectronic Test Structure)

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概要

• 論文の詳細を見る

• The objective, when mapping a wafer, is to capture the the full variation across the wafer while minimising the number of measurements. This is a very similar objective to that of experimental design and this paper applies classical Design Of Experiment (DOE) techniques to the selection of measurement points for wafer mapping. The resulting measurements are then fitted using Response Surface Methodology (RSM) from which contour plots or wafer maps can be generated. The accuracy of the fit can be ascertained by inspection of the adjusted R^2 value and it is demonstrated that in many cases transformations can be used to improve the accuracy of the resulting wafer maps.

• 社団法人電子情報通信学会の論文
• 1996-02-25

著者

• Walton A

  Univ. Edinburgh Edinburgh Gbr

• Fallon M

  Larkfield Industrial Estate Greenock Gbr

• WALTON Anthony

  Edinburgh Microfabrication Faculty, Department of Electrical Engineering, Kings Buildings, Universit

• FALLON Martin

  Edinburgh Microfabrication Faculty, Department of Electrical Engineering, Kings Buildings, Universit

• WILSON David

  Motorola Ltd.

関連論文

• The Application of DOE and RSM Techniques for Wafer Mapping in IC Technology (Special Issue on Microelectronic Test Structure)

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