Non-deterministic Constraint Generation for Analog and Mixed-Signal Layout (Special Issue on Synthesis and Verification of Hardware Design)
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概要
- 論文の詳細を見る
In this paper we propose a comprehensive approach to physical design based on the constraint paradigm. Bounds on the most critical circuit parasitics are automatically generated to help designers and/or physical design tools meet a set of high-level specifications. The constraint generation engine is based on constrained optimization, where various parasitic effects on interconnect and devices are accounted for and dealt with in different manners according to their statistical behavior and their effect on performance.
- 社団法人電子情報通信学会の論文
- 1997-10-25
著者
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Sangiovanni-vincentelli Alberto
Department Of Eecs University Of California
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CHARBON Edoardo
Cadence Design Systems, Inc.
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MALAVASI Enrico
Cadence Design Systems, Inc.
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MILIOZZI Paolo
Rockwell Semiconductor Systems
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Charbon Edoardo
Cadence Design Systems Inc.
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Malavasi Enrico
Cadence Design Systems Inc.