Generating Random Benchmark Circuits with Restricted Fan-Ins (Special Issue on Synthesis and Verification of Hardware Design)

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概要

• 論文の詳細を見る

• Our basic idea of generating random benchmark circuits, i.e., not generating them directly but applying random transformations to initial circuits was presented at DAC'94. In this paper we make the two major improvements towards the goal of random benchmarking: i.e., increasing the generality, the naturality, the security of random circuits: One is controlling fan-ins of logic gates in the random circuits, and the other is producing the initial circuit also at random but under some control of its on-set size and complexity. Experimental data claiming merits of those improvements are also given.

• 社団法人電子情報通信学会の論文
• 1997-10-25

著者

• Iwama K

  Kyoto Univ. Kyoto Jpn

• Iwama K

  The Department Of Computer Science And Communication Engineering Kyushu University

• IWAMA Kazuo

  the Department of Computer Science and Communication Engineering, Kyushu University

• HINO Kensuke

  the Industrial Instrumentation & Control Systems Department, TOSHIBA Corporation

• KUROKAWA Hiroyuki

  the Research & Development, JUST-SYSTEM Corporation

• SAWADA Sunao

  the Department of Computer Science and Communication Engineering, Kyushu University

• Sawada Sunao

  The Department Of Computer Science And Communication Engineering Kyushu University

• Hino Kensuke

  The Industrial Instrumentation &amp Control Systems Department Toshiba Corporation

• Kurokawa H

  The Research &amp Development Just-system Corporation

関連論文

• Generating Random Benchmark Circuits with Restricted Fan-Ins (Special Issue on Synthesis and Verification of Hardware Design)
• Recent Developments in Mesh Routing Algorithms(Special Issue on Algorithm Engineering : Surveys)

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