Automatic Hardware Synthesis of Multimedia Synchronizers from High-Level Specifications (Special Issue on Multimedia Computing and Communications)

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概要

• 論文の詳細を見る

• In this paper, we show that by suitably selecting a notation to construct synchronization requirement specifications (SRS) for multimedia presentation we can express the timing characteristics at an abstract level, verify the Specification, and obtain a hardware implementation through a sequence of transformations of the Specification. First, we introduce the notion of a well-formed SRS and its hardware model. Second, we model an SRS as a timed Petri net and interpret the transitions of the net as hardware signals. To obtain logic functions from the SRS, we simplify the net and obtain a signal transition graph satisfying the unique state coding property. Finally, we Show how to obtain a logic-level design of synchronizers.

• 一般社団法人電子情報通信学会の論文
• 1996-06-25

著者

• Naik Kshirasagar

  Department Of Computer Software University Of Aizu

関連論文

• Automatic Hardware Synthesis of Multimedia Synchronizers from High-Level Specifications (Special Issue on Multimedia Computing and Communications)

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