A Task Mapping Algorithm for Linear Array Processors
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概要
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The linear array processor architecture is an important class of interconnection structures that are suitable for VLSI. In this paper we study the problem of mapping a task tree onto a linear array to minimize the total execution time. First, an optimization algorithm is presented for a message scheduling probrem which occurs in the task tree mapping problem. Next, we give a heuristic algorithm for the task tree mapping problem. The algorithm partitions the node set of a task tree into clusters and maps these clusters onto processors. Simulation experiments showed that the proposed algorithm is much more efficient than a conventional algorithm.
- 社団法人電子情報通信学会の論文
- 1994-05-25
著者
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Kawaguchi Tsuyoshi
Faculty Of Engineering Oita University
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Tamura Yoshinori
Faculty of Engineering, Miyazaki University
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Utsumiya Kouichi
Faculty of Engineering, Oita University
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Tamura Yoshinori
Faculty Of Engineering Miyazaki University
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Utsumiya Kouichi
Faculty Of Engineering Oita University
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