High-Level Synthesis of Pipelined Circuits from Modular Queue-Based Specifications(Special Section on VLSI Design and CAD Algorithms)

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概要

• 論文の詳細を見る

• This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modular specification language with an efficient implementation. In our system, the designer specifies the circuit as a set of independent modules connected by conceptually unbounded queues. Our synthesis algorithm automatically transforms this modular, asynchronous specification into a tightly coupled, fully synchronous implementation in synthesizable Verilog.

• 一般社団法人電子情報通信学会の論文
• 2001-11-01

著者

• Marinescu Maria-cristina

  The Mit Laboratory For Computer Science

• RINARD Martin

  the MIT Laboratory for Computer Science

関連論文

• High-Level Synthesis of Pipelined Circuits from Modular Queue-Based Specifications(Special Section on VLSI Design and CAD Algorithms)

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